OpenAI's debut self-designed chip, codenamed Jalape帽o, has burst onto the scene with astonishing speed, shaking up the established order of the AI chip industry. This isn't just a product launch; it's a clear signal that AI is fundamentally reshaping how chips are designed.

According to a Bloomberg report from August 25, OpenAI has stated that Jalape帽o outperforms NVIDIA's GB300 on two critical metrics: AI workload processing per unit of power and response speed. The chip, developed in collaboration with Broadcom, is specifically designed for the AI inference phase and is expected to enter practical use later this year. Richard Ho, OpenAI's chip chief, noted that Jalape帽o delivers robust performance at a low 700-watt power draw, which could significantly reduce data center electricity costs.

Semiconductor research firm SemiAnalysis has revealed that the chip's journey from design inception to tape-out took roughly 16 months, with the crucial CoWoS packaging tape-out node completed in November 2025. That's just nine months ago, far below the industry standard cycle of 18 to 36 months.

Why the Industry's Assumptions Are Being Turned Upside Down

SemiAnalysis researchers visited OpenAI's lab and put Jalape帽o through its paces using the firm's proprietary benchmark suite, InferenceX. The verdict was direct: the chip beat every NVIDIA, AMD, and Google chip they had previously tested on the performance-per-watt metric. What's even more striking is that this result was achieved without Jalape帽o having speculative decoding enabled or prefill/decode disaggregation optimizations in place, while the competing chips were running their best configurations.

Renowned semiconductor analyst Dylan Patel didn't mince words: "It's not just Blackwell that's been toppled; even NVIDIA's Rubin chip has been surpassed." Analysts believe this directly challenges NVIDIA's market dominance and forces a re-evaluation of the competitive landscape in AI chips.

Key Test Results Show Jalape帽o Dominates Blackwell

SemiAnalysis's testing shows Jalape帽o's inference efficiency advantages are substantial. On the GPT-OSS 120B model, Jalape帽o outputs roughly 1,459 tokens per second, compared to just 535 for NVIDIA's GB200. For end-to-end latency, Jalape帽o completes a task in just 1.65 seconds, while the GB300 takes nearly 6 seconds, a 3.6x gap. In high-interaction scenarios, when the GB300 is pushed to its fastest decode speed of 169 tokens per second, Jalape帽o's throughput is an astonishing 104.3 times higher.

On the critical metric of tokens output per megawatt per second, a key measure of data center energy efficiency, Jalape帽o hits approximately 53 million tokens/MW/s on the GPT-OSS model, while the GB200 NVL72 manages only around 10 million. SemiAnalysis points out that this metric essentially equals tokens produced per joule, which directly determines a data center's revenue ceiling. In an era where compute is constrained by electricity, this advantage is particularly crucial.

Looking at system-level costs, SemiAnalysis included power, cooling, and networking in its calculations and found Jalape帽o's total cost of ownership per chip per hour is about $1.56, nearly matching the H100's $1.55, while NVIDIA's Vera Rubin comes in at a hefty $3.61.

However, SemiAnalysis also raised several important caveats. First, the models used in testing are not the most cutting-edge available. NVIDIA and AMD have published results on larger models like DeepSeek V4 Pro and Kimi K3 using the AgentX suite, which Jalape帽o has yet to complete. This suite is better at reflecting real-world production scenarios involving multi-turn, long-context interactions.

Second, a fairer comparison would pit Jalape帽o against NVIDIA's Vera Rubin, which also uses HBM4, rather than Blackwell. Vera Rubin offers a 5.4x performance-per-watt improvement over the GB200 NVL72, and when comparing the two directly, their total cost of ownership per token is nearly on par. Third, Jalape帽o is still in the engineering sample stage, with mass production not expected to ramp up until 2027.

How AI Tools Accelerated Chip Design

The deep integration of AI tools is a core reason Jalape帽o was developed so rapidly. SemiAnalysis reveals that OpenAI made extensive use of its internal AI models, including the widely watched GPT-Astra, throughout the chip design process. X user Andrew Curran, citing OpenAI information, noted that GPT-Astra was deeply involved in the entire R&D journey: "The team used Codex and GPT-Astra to optimize three open-source models, which were not originally in Jalape帽o's production plan, to high-performance status within two months."

This means AI is not just accelerating chip design itself, but also rapidly expanding the range of models the chip can support. SemiAnalysis's data further quantifies this contribution: AI-assisted design reduced SIMD unit area by 8% and matrix engine area by 10%, while also delivering better timing and power performance than the initial versions.

On the software side, OpenAI used an internal extended version of Codex to write Jalape帽o's kernels, with some kernel code reaching around 3,000 lines. In the most performance-critical attention and MoE modules, AI-generated code proved to be 1.5 to 1.8 times faster than implementations by top human engineers. SemiAnalysis's commentary on this is pointed: OpenAI models running on NVIDIA GPUs are being used to design a chip that poses a genuine threat to the CUDA moat. "NVIDIA's own GPUs are, in real time, giving birth to their potential successor."

Architecture Insights: Why "General" Can Be Faster

While outsiders assumed Jalape帽o was a chip deeply customized for OpenAI's own models, SemiAnalysis's findings suggest the opposite: Jalape帽o is a general-purpose chip for AI inference, capable of running a wide variety of models and workloads, even including a version of the game Doom ported using Codex.

Architecturally, Jalape帽o's core design philosophy is "eliminating fixed latency." Unlike GPUs that rely on complex memory hierarchies, Jalape帽o directly binds compute cores to HBM slices, with cores syncing via a dedicated high-bandwidth collective network, significantly reducing memory access latency. Furthermore, Jalape帽o employs out-of-order execution cores with L1 cache, rather than the software-managed scratchpads common in other accelerators, allowing it to get closer to hardware theoretical peak performance in small-batch, low-latency scenarios.

In terms of memory bandwidth, Jalape帽o uses HBM4 to achieve a single-package memory bandwidth of 15.4TB/s, with HBM bandwidth per watt at 22, compared to NVIDIA's Rubin at 11.1 and GB300 at just 5.71. SemiAnalysis notes Jalape帽o's HBM4 pin speed is 10Gbps, slightly higher than Rubin's 9.6Gbps, with Samsung likely being the HBM supplier.

Interestingly, Jalape帽o opts against prefill/decode disaggregation. SemiAnalysis explains this in detail: in real production environments, input-output ratios, concurrency, and cache hit rates constantly fluctuate, and fixed pooling leads to lower global utilization. A homogeneous resource pool can flexibly respond to traffic changes, dynamically allocating between latency-sensitive requests and high-throughput batch processing.

Is the CUDA Moat Starting to Crack?

SemiAnalysis's report makes a weighty assertion: CUDA's moat may already be dead. The basis is a comparison of software startup speed. NVIDIA's Rubin completed its CoWoS tape-out a month before Jalape帽o, but so far, the only public Rubin benchmark data available comes from CoreWeave's engineering samples. NVIDIA hasn't opened its labs to third-party testing like OpenAI has. SemiAnalysis believes this reflects not a hardware gap, but a software maturity gap.

Building a software stack from scratch actually allowed OpenAI to shed legacy baggage and make cleaner architectural decisions. OpenAI uses its self-developed kernel programming language Gluon, built on Triton, and an internal inference engine called "Teacup," with Codex accelerating kernel tuning. SemiAnalysis observed that in less than two weeks, Jalape帽o's throughput at specific interaction speeds more than doubled. In just 8 days, the team scaled tensor parallelism from TP8 to TP32, achieving full-rack, cross-rack deployment.

However, SemiAnalysis also clearly notes that current testing only covers a relatively simple 8k1k workload, and the AgentX multi-turn long-context tests have not yet been completed. Under more complex agent workloads, components like routers and prefix caches will face new challenges.

What's Next: B0 Silicon in Fab, 10GW Vision Unfolding

The Jalape帽o story is far from over. SemiAnalysis reports that the publicly tested samples are all A0 stepping, while B0 stepping has already entered the fab. B0 is expected to offer another ~25% improvement in performance-per-watt over A0, with a single compute die delivering 13.4 PFLOPs of MXFP4 compute while maintaining a 700W TDP.

At the system level, OpenAI has partnered with Celestica to design the complete rack solution: each ASIC rack houses 128 Jalape帽o chips, with a dual-rack system drawing about 160kW total power, comparable to NVIDIA's GB300 dual-wide rack. For scale-out, a single scaling network domain can connect up to 2,048 Jalape帽o XPUs across 16 racks. Production is expected to ramp gradually starting in 2027, with the next milestone being a 100MW deployment scale.

The broader strategic picture involves OpenAI and Broadcom having signed a 10GW custom accelerator cooperation agreement, a scale roughly equivalent to the full power output of ten nuclear power units. Richard Ho has stated that the company has reached power and cost levels that can meaningfully reduce infrastructure costs, calling it "just the first step." He also emphasized that NVIDIA remains an important partner, and OpenAI's compute demands are so vast that it won't abandon existing suppliers anytime soon.

Analysts suggest that Jalape帽o's significance may not lie in how many NVIDIA chips it can replace today, but in what it proves: that an AI company, using AI tools, built a genuinely competitive chip in record time. That flywheel has already started turning.