AI computing infrastructure is undergoing a fundamental architectural transformation. As the scale of large model training and inference expands, AI servers are evolving from small clusters of tens of graphics cards to super nodes comprising hundreds or thousands of cards. Simply put, future AI chips must not only "compute faster" but also "connect faster," with data transmission efficiency between chips becoming the critical factor for unlocking computing power.

Against this backdrop, traditional pluggable optical modules, which rely on longer electrical signal paths, are approaching their transmission limits. The trend of "optical advancing, copper retreating" is also deepening, moving from between data center racks to inside the racks, inside equipment, and even close to the chips.

Recent research from Northeast Securities indicates that Near-Packaged Optics (NPO) is expected to be the most engineering-feasible high-speed optical interconnect solution for the current stage. NPO deploys independently packaged optical engines near the ASIC, retaining the performance advantages of Co-Packaged Optics (CPO) while offering higher manufacturing yields and easier maintenance.

Compared to traditional pluggable solutions, NPO can significantly shorten high-speed electrical channels, reducing signal loss by approximately 9-11dB. While its performance gap with CPO is only about 3dB, NPO holds a clear advantage in mass production and maintenance. For the industry, NPO represents an upgrade path for existing AI infrastructure without requiring a complete overhaul.

Currently, industrialization is accelerating. Both domestic and international companies have introduced various high-density optical engine solutions, and some cloud providers have begun pilot deployment. Since NPO does not require deep integration of optical components with AI chips, it is better suited to the current maturity of the industrial chain and is expected to become a key direction for AI cluster upgrades in the coming years.

AI Competition Shifts from "Chip Performance" to "System Efficiency"

In recent years, the AI infrastructure competition has largely revolved around the computing power of a single chip. However, with the rapid growth of large model scales, the industry focus is shifting from "whose chip is stronger" to "who can make the entire system run faster."

Long-context models, multi-modal models, MoE architectures, and expanding inference stages all require extensive data exchange between chips. No matter how powerful a single chip is, if the communication between them is too slow, the overall computing power cannot be fully utilized.

Consequently, the core metric for AI clusters is transitioning from peak computing power to effective computing power, which is the computational capacity the entire system can actually deliver. Super nodes are becoming a crucial vehicle for this trend. As AI servers expand from single racks to multiple racks, hundreds or even thousands of AI chips need high-speed interconnection. Traditional PCBs, copper cables, and connectors are increasingly struggling to meet the demands for bandwidth, power consumption, and heat dissipation.

While optical modules are already widely used in Scale-out networks, Scale-up networks (interconnects within and between chips in a node) still heavily rely on copper connections. However, these Scale-up networks have higher bandwidth requirements and are becoming a key growth market for optical interconnects.

SerDes Upgrades Hit Electrical Interconnect Limits, Ushering in the NPO Era

The core driver accelerating the development of NPO is the physical limitation imposed by the evolution of high-speed SerDes technology.

Using AI chip interconnection as an example, as new GPU architectures continuously increase SerDes rates, the single-chip interconnect bandwidth grows. From tens of Gbps to hundreds of Gbps, and eventually to thousands of Gbps, the transmission distance for electrical signals is shrinking, and channel loss is rising rapidly. Under 112G/lane conditions, packaging-level high-speed channel loss has already reached a high level. Entering the 224G/lane era, traditional electrical interconnects face even more severe challenges.

At the same time, pluggable optical modules require longer host-side electrical channels. In high-bandwidth switching equipment, the power consumption of optical modules can approach half of the system's total power. For example, a 12.8T switch using 32 400G pluggable optical modules, each consuming about 12W, would see the optical modules alone consume 384W, nearly matching the power of the switch chip itself. As bandwidth continues to increase, the approach of using DSP to compensate for longer electrical channels is hitting cost and energy efficiency limits, making architectural upgrades inevitable.

To put it simply, in the past, the solution was "if copper isn't long enough, use optical modules." In the future, the challenge will be "the distance is too short and the speed is too fast; optics must be placed directly next to the chip."

The Core of the NPO Industry Chain: Optical Engines, Light Sources, and High-Density Connections

The core of NPO is to bring optical communication capabilities closer to the AI chip. The most critical component is the optical engine, which is responsible for converting electrical signals to optical signals and vice versa. Currently, two main technological paths exist: Silicon Photonics (SiPh) and VCSEL.

The SiPh path offers advantages such as high integration, low loss, and compatibility with semiconductor manufacturing processes, making it more suitable for future high-bandwidth AI interconnect scenarios. The VCSEL path remains competitive in ultra-short-reach interconnects due to its cost advantages and high-speed short-distance transmission capabilities.

As optical engine power increases, light source solutions are also being upgraded. External laser sources, by separating the laser from the high-temperature chip area, can lower temperature, improve reliability, and facilitate maintenance. Internal light sources help further improve system integration.

Additionally, high-density optical connections are a vital component of NPO. While traditional optical modules may only need to connect a small number of fibers, NPO needs to support dozens or more channels, placing higher demands on fiber arrays, precision manufacturing, and long-term stability.

Domestic AI Computing Power Accelerates Adoption of NPO

From a technical compatibility perspective, NPO aligns well with the development path of domestic AI computing power. As domestic AI accelerator cards evolve towards super nodes, the scale of computation expands, creating higher demands for high-speed, low-latency interconnects. Unlike CPO, which relies on advanced packaging capabilities, NPO can achieve optical interconnect upgrades without changing the ASIC packaging system, making it more suited to the current engineering foundation of the domestic industry chain.

Currently, domestic companies are accelerating their layouts around high-density optical engines, optical connections, light sources, and related standards. Some super node solutions have begun to validate the NPO technical path. As AI infrastructure is deployed at scale, NPO is expected to become a crucial support for improving the effective computing power of domestic computing clusters.

Investment Logic: NPO Drives Comprehensive Upgrade of the Optical Interconnect Industry Chain

As AI infrastructure enters the era of high-speed interconnection, NPO is poised to drive an upgrade of the entire optical communication industry chain. The benefiting directions are primarily concentrated in several areas.

First is the optical engine segment. Companies with capabilities in high-speed optical modules, silicon photonics platforms, and electro-optical conversion are expected to benefit from the growing demand for high-speed optical engines.

Second is the high-density optical connection segment. As NPO significantly increases the number of fibers and connection density, the value of connection technologies like MT ferrules, MPO/MTP, and Fiber-to-Chip will continue to rise.

Third is the FAU and micro-optics segment. As optical I/O density increases, high-precision fiber arrays and micro-nano optical devices become key bottlenecks.

Fourth is the light source and upstream material segment. Demand for high-power lasers, VCSELs, and materials like Indium Phosphide will grow alongside the optical interconnect upgrade.

Fifth is the advanced packaging and optoelectronic integration segment. Although NPO reduces reliance on advanced packaging, optoelectronic co-manufacturing will remain a key direction for industrial upgrading.

Sixth is the domestic AI computing and switching infrastructure segment. The expansion of super nodes will continuously drive demand for high-speed interconnect chips, switching equipment, and system-level solutions.

Overall, AI infrastructure is moving from "computing power stacking" into a phase of "interconnect efficiency competition." As electrical interconnects approach their physical boundaries, NPO is expected to become a new type of infrastructure connecting chips, storage, and networks, propelling the optical communication industry chain into a new growth cycle.